The present invention relates, in general, to dynamic random access memory (DRAM) cells and, more particularly, to a DRAM cell having a trench capacitor.
Various types of DRAM cells are known in the industry. With the increased density of DRAM arrays, the use of trench cells are becoming more prevalent. However, existing trench cell technology has also become a limiting factor in the number of cells that can be placed in an array. For example, trench capacitors were originally formed adjacent the accompanying transistor, such as shown in U.S. Pat. No. 4,683,486, "DRAM Cell and Array". In order to further reduce the size of the device, a transistor was formed within the confines of a trench capacitor, such as in U.S. Pat. No. 4,686,552, "Integrated Circuit Trench Cell" assigned to Motorola Inc.
Therefore, there exists a need in the industry for a improved methods of manufacturing trench cells which provide smaller, more compact cells.
Accordingly, it is an objective of the present invention to provide a DRAM cell having a trench capacitor which overcomes the above deficiencies.
Another object of the present invention is to provide a DRAM cell having a trench capacitor which has a reduced size.
Still another object of the present invention is to provide a DRAM utilizing a VMOS device.